A monolithic design allows for integration of the amplifier onto a single discrete chip which eliminates the need for extensive tuning and wire bonding. In a co-pending U.S. Application, Ser. No. 008519, filed Jan. 29, 1987 and entitled "Distributed Amplifier Having Improved D.C. Biasing and Voltage Standing Wave Ratio Performance", the performance of a distributed amplifier is improved by incorporating the DC biasing network on the integrated chip. A spiral inductor is arranged between the DC biasing networks and the amplifying devices for providing an effective open path for the frequency bandwidth desired for the amplifier, while providing a low resistive path for the DC bias currents. This results in isolating the frequency signal of the amplifier from the respective bias supplies, thereby improving the performance of the amplifier.
The effectiveness of this isolation, however, is dependent on the magnitude of the inductive impedance associated with the spiral inductor, which magnitude is directly related to the size of the spiral inductor. Additionally, for a given spiral inductor of certain size, the effective impedance of the spiral is directly related to the frequency of the RF signal, with the effective impedance of the spiral increasing with an increase in frequency of the RF signal. Thus, an inductor of a certain size arranged between a DC bias and the amplifying stage provides better isolation of the higher frequencies of the RF. To compensate for the lesser effective impedance of the lower frequencies of the RF signal such as in the range of 1.0 GHz to 3.0 GHz, the spiral inductor would have to be increased in size to provide a greater effective impedance. In this way, the overall inductance of the spiral will be increased due to the increased sizes, resulting in better isolation of the RF signal at the lower frequencies.
A limitation in increasing the inductor size for increasing the effective impedance at lower frequencies is that as the spiral inductor is increased in size, the shunt capacitance associated with the inductive line of the spiral and the ground back plane of the semiconductor device is also increased. This becomes potentially acute in GaAs semiconductor devices, where the substrate is typically very thin e.g., 5 mil. Thus, as the spiral inductor is structurally increased in size, the more parasitic shunt capacitance develops, thus resulting in a degradation of the higher frequency response. Therefore, although the performance of the lower frequency response is improved due to the increased inductance, the higher frequency response is adversely affected due to the increased shunt capacitance.